Driver: states
The state structures in this header are exposed for introspection and driver debugging purposes. This is not part of the gint API, and there is no stability guarantee across minor and patch versions of gint.
typedef struct{ uint32_t SSCGCR; struct cpg_overclock_setting speed;}cpg_state_tCPU (see cpu/cpu.c)
typedef struct{ uint32_t SR; uint32_t VBR; uint32_t CPUOPM; uint32_t rN_bank[8];}cpu_state_tDirect Memory Access controller (see dma/dma.c)
typedef struct{ sh7305_dma_channel_t ch[6]; uint16_t OR;}dma_state_tInterrupt Controller (see intc/intc.c)
typedef struct{ uint16_t IPR[12]; uint8_t MSK[13];}intc_state_tMemory Manager Unit (see mmu/mmu.c)
typedef struct{ uint32_t PASCR; uint32_t IRMCR;}mmu_state_tR61524 display (see r61524/r61524.c)
typedef struct{ /* Graphics RAM range */ uint16_t HSA, HEA, VSA, VEA;}r61524_state_tReal-time Clock (see rtc/rtc.c)
typedef struct{ uint8_t RCR1, RCR2;}rtc_state_tSound Processing Unit (see spu/spu.c)
typedef struct{ uint32_t PBANKC0, PBANKC1; uint32_t XBANKC0, XBANKC1;}spu_state_tT6K11 display (see t6k11/t6k11.c)
typedef struct{ /* Some status bits, obtained by using the STRD command. There are other parameters that cannot be read */ uint8_t STRD;}t6k11_state_tTimer Unit (see tmu/tmu.c)
typedef struct{ /* Individual timers; TSTR is used for ETMU */ struct tmu_state_stored_timer { uint32_t TCOR; uint32_t TCNT; uint16_t TCR; uint16_t TSTR; } t[9]; /* TSTR value for TMU */ uint8_t TSTR;}tmu_state_tUSB 2.0 function module (see usb/usb.c)
typedef struct{ /* Control and power-up. We don't save power-related registers from other modules nor UPONCR, because they must be changed to use the module */ uint16_t SYSCFG, BUSWAIT, DVSTCTR, SOFCFG, TESTMODE, REG_C2; /* Interrupt configuration */ uint16_t INTENB0, INTENB1, BRDYENB, NRDYENB, BEMPENB; /* Default Control Pipe */ uint16_t DCPMAXP;}usb_state_tTouch-screen modules
typedef struct{ uint16_t PRCR; uint16_t PJCR; uint8_t ICCR; uint8_t ICIC; uint8_t ICCL; uint8_t ICCH;}touch_state_t