hollyhock-3/ubc_8hpp_source.html

 #pragma once

 #include <stdint.h>


 volatile uint32_t &UBC_REG_CBR0 = *reinterpret_cast<uint32_t *>(0xFF200000);

 volatile uint32_t &UBC_REG_CRR0 = *reinterpret_cast<uint32_t *>(0xFF200004);

 volatile uint32_t &UBC_REG_CAR0 = *reinterpret_cast<uint32_t *>(0xFF200008);

 volatile uint32_t &UBC_REG_CAMR0 = *reinterpret_cast<uint32_t *>(0xFF20000C);

 volatile uint32_t &UBC_REG_CBCR = *reinterpret_cast<uint32_t *>(0xFF200620);


 const uint32_t UBC_CBR_ID = 4;

 const uint32_t UBC_CBR_RW = 1;

 const uint32_t UBC_CBR_CE = 0;


 const uint32_t UBC_CRR_RESERVED = 13;

 const uint32_t UBC_CRR_PCB = 1;

 const uint32_t UBC_CRR_BIE = 0;


 const uint32_t UBC_CBCR_UBDE = 0;

UBC_REG_CRR0
volatile uint32_t & UBC_REG_CRR0
Match operation setting register 0.
Definition: ubc.hpp:11

UBC_CRR_PCB
const uint32_t UBC_CRR_PCB
CRR.PCB offset (bits).
Definition: ubc.hpp:29

UBC_REG_CAMR0
volatile uint32_t & UBC_REG_CAMR0
Match address mask setting register 0.
Definition: ubc.hpp:15

UBC_CBR_CE
const uint32_t UBC_CBR_CE
CBR.CE offset (bits).
Definition: ubc.hpp:24

UBC_REG_CBCR
volatile uint32_t & UBC_REG_CBCR
Break control register.
Definition: ubc.hpp:17

UBC_REG_CAR0
volatile uint32_t & UBC_REG_CAR0
Match address setting register 0.
Definition: ubc.hpp:13

UBC_REG_CBR0
volatile uint32_t & UBC_REG_CBR0
Match condition setting register 0.
Definition: ubc.hpp:9

UBC_CBR_ID
const uint32_t UBC_CBR_ID
CBR.ID offset (bits).
Definition: ubc.hpp:20

UBC_CRR_BIE
const uint32_t UBC_CRR_BIE
CRR.BIE offset (bits).
Definition: ubc.hpp:31

UBC_CBR_RW
const uint32_t UBC_CBR_RW
CBR.RW offset (bits).
Definition: ubc.hpp:22

UBC_CRR_RESERVED
const uint32_t UBC_CRR_RESERVED
CRR.RESERVED offset (bits).
Definition: ubc.hpp:27

UBC_CBCR_UBDE
const uint32_t UBC_CBCR_UBDE
CBCR.UBDE offset (bits).
Definition: ubc.hpp:34